Chameleon Systems, Inc.(www.chameleonsystems.com), a fabless semiconductor company, develops, markets, implements and supports a high performance streaming data processing platform for digital signal processing (DSP) applications. This platform delivers ASIC-like performance combined with the time-to-market advantage of programmable chips. Based upon its multiple-patented parallel computing architecture and high-level algorithm development environment, Chameleonís streaming data processing (SDP) approach provides a cost effective and easy-to-use solution for data-intensive DSP applications, enabling DSP designers to rapidly optimize their own system, application and algorithm designs directly onto a fast, parallel implementation suitable for product delivery. Chameleon is based in San Jose and was founded in 1997. It has currently 40 employees including an excellent team of experts in processor architecture, software tools and system applications
.† Chameleon is a privately held corporation with funding from blue chip venture firms like 3i, Morgenthaler, Infinity Technology Ventures as well as Synopsys.
Chameleon's first generation reconfigurable communication processor (RCP) provided a solution for processing-intensive multi-channel communications applications and was geared towards the 3G wireless base station market. The companyís platform-based approach, combined with a microprocessor-style debugging environment, enabled customers to implement proprietary algorithms and achieve fast time-to-market. Chameleonís proprietary eConfigurable technology had the power to instantaneously adapt to changing traffic patterns and the flexibility to future-proof customer systems. This first generation product was well received by major wireless base station manufacturers, including Ericsson, Nortel, Motorola, Alcatel, LG, Fujitsu and NTT DoCoMo. However, weak macroeconomic conditions, especially in the telecommunications sector, led to very low demand for new systems and design starts. Therefore, Chameleon decided to not bring this product into production but rather take advantage of the market delay and aggressively move on to develop the next generation product.
According to Forward Concepts (Tempe, AZ) the market for reconfigurable and high performance programmable digital signal processing applications will grow from $0.7B today to† $1.8B in 2006, representing a CAGR of 26%. The continuing ASIC NRE cost rise for smaller process geometries (0.13u and below) will further increase demand for the type of product that Chameleon is developing.
Chameleon is now working on its 3rd generation dynamic reconfigurable architecture -a streaming data processing (SDP) platform and software design environment. Chameleon uses a software-driven development and optimization approach, resulting in a tightly coupled software / hardware solution. System and DSP designers capture algorithms with industry standard tools like Matlab/Simulink. Chameleonís innovative, easy-to-use and unique EDA tool chain will then automatically schedule and map the algorithms directly to the SDP platform. This substantially increases designer productivity by hiding the complexities of parallel processing architectures and dynamic reconfiguration as well as by avoiding the unpredictability of a register transfer level (RTL) Ė a design step that is still required for programmable logic device (PLD) and application specific integrated circuit (ASIC) implementations. Chameleonís 3rd generation architecture is optimized for 8/16/32-bit data streams and therefore has broad applicability for highly data path-intensive demands in video, image and wireless applications. Due to its efficient implementation, Chameleonís SDP solution provides substantial advantage in performance density, cost and power over leading PLD and programmable DSP offerings Ė typically in the range of 5x to 10x.
Chameleonís SDP platform is neither a DSP, nor a PLD, nor a custom ASIC product. It blends elements and key advantages of all these product approaches into a unique reconfigurable streaming data processing solution that delivers higher performance and lower cost than DSP+PLD alternatives, and one that is much easier to use. It provides faster time-to-market and more flexibility than ASICs and redirects the usersí design efforts toward system, algorithm and application design rather than complex software and chip design.
Leading semiconductor and system companies have evaluated Chameleonís new streaming data processing architecture and algorithm-level EDA tool approach and have validated its advanced position in the reconfigurable solution space.